1. Field of the Invention
The present invention relates generally to a packet processing apparatus, and particularly to a packet processing apparatus for analyzing information such as the destination and sender of a packet.
2. Description of the Related Art
In a packet processing apparatus such as a router apparatus that processes packets conforming to IP (Internet Protocol), for example, a packet analyzing module is implemented and a packet transmission process is performed according to a result of analyzing information such as the destination and sender of the packet.
Generally, a device such as a network processor is used as the packet analyzing module, and a CAM (Content Addressable Memory) device is used for the information analysis of the packet. A CAM, which is an associative memory, realizes a function of inputting data stored in a CAM entry (memory) as a key and providing in return an address of the CAM entry in which the key data is stored.
An IP router, unlike a telephone exchange apparatus, realizes connectionless communications, and is characterized by performing information analysis of an input packet in real time to determine the destination of the packet and whether transmission is possible.
FIG. 1 is a block diagram showing a conventional configuration of an IP router apparatus. As is shown in this drawing, the IP router apparatus includes line terminating units 101˜10N respectively terminating lines connected to the IP router apparatus, packet processing units 121˜12N to which packets received from the respective lines are supplied, and a switch fabric 14. The packet processing units 121˜12N each have a network processor (NP) for analyzing information such as the destination and sender of a packet and supplying the analyzing result together with the packet to the switch fabric 14. The switch fabric 14 switches the packets supplied from the packet processing units 121˜12N according to their respective analyzing results, after which the switched packets are supplied to the respective packet processing units 121˜12N so that information such as the destination and sender of each of the switched packets is analyzed. Then, the packets are sent to their corresponding destination lines via the respective line terminating units 101˜10N.
Also, other conventional systems for handling variable-length packets can be found, for example, in Japanese Laid-Open Patent Application No. 2000-101638.
In recent years and continuing, progress is being made in increasing data speed, and with this advancement, the capacity of the router and the data transmission speed are also being increased. As a result, the processing speed of the packet analyzing module (PFE: Packet Forwarding Engine) has to be increased in accordance with the increase of the data transmission speed.
However, the processing capability of a packet analyzing module such as the network processor is limited, and depending on the transmission speed and the packet length, there may be cases in which a process that is to be performed for a packet cannot be completed during its packet transmission time. Further, when the physical speed is increased, the problem with processing speed becomes more apparent and may lead to the degradation of the relaying performance of the packet analyzing module.